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Codec ADC gain and DAC volume settings optimized, but not perfect yet

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Sebastian
2025-05-29 18:47:41 +02:00
parent 2ffd1997b9
commit 4da1c8fa9d
1 changed files with 14 additions and 14 deletions
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28
soundcube-i2s-test/soundcube-i2s-test.ino
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@ -90,7 +90,7 @@ void setup() {
// GENERAL // GENERAL
cw(0x00, 0x00); // select page 0 cw(0x00, 0x00); // select page 0
cw(0x01, 0x01); // soft reset cw(0x01, 0x01); // soft reset
cw(0x1b, 0x30); // select I2S with 32 bit word length cw(0x1b, 0b00000000); // select I2S with 16 bit word length
cw(0x1d, 0b00000000); // disable loopback cw(0x1d, 0b00000000); // disable loopback
// POWER and CM // POWER and CM
@ -98,21 +98,21 @@ void setup() {
cw(0x01, 0x08); // disable weak (crude) AVdd connection to DVdd cw(0x01, 0x08); // disable weak (crude) AVdd connection to DVdd
cw(0x02, 0x01); // enable internal AVdd LDO and enable analog blocks cw(0x02, 0x01); // enable internal AVdd LDO and enable analog blocks
cw(0x09, 0b00001100); // power up LOL, LOR, power down MAL, MAR, HPL, HPR cw(0x09, 0b00001100); // power up LOL, LOR, power down MAL, MAR, HPL, HPR
cw(0x0a, 0b00000000); // set full chip CM to 0.9V cw(0x0a, 0b01000000); // set full chip CM to 0.75V
cw(0x47, 0b00110010); // analog input quick charge time 6.4ms cw(0x47, 0b00110010); // analog input quick charge time 6.4ms
// ROUTING // ROUTING
cw(0x00, 0x01); // select page 1 cw(0x00, 0x01); // select page 1
cw(0x34, 0b11000000); // route IN1L to LEFT_P with 20k input impedance cw(0x34, 0b11000000); // LEFT MICPGA P route IN1L to LEFT_P with 40k input impedance
cw(0x36, 0b11000000); // route CM to LEFT_M with 20k input impedance cw(0x36, 0b11000000); // LEFT MICPGA M route CM to LEFT_M with 20k input impedance
cw(0x37, 0b11000000); // route IN1R to RIGHT_P with 20k input impedance cw(0x37, 0b11000000); // RIGHT MICPGA P route IN1R to RIGHT_P with 20k input impedance
cw(0x39, 0b11000000); // route CM to RIGHT_M with 20k input impedance cw(0x39, 0b11000000); // RIGHT MICPGA M route CM to RIGHT_M with 20k input impedance
cw(0x3a, 0b00111100); // connect IN2, IN3 weakly to CM cw(0x3a, 0b00111100); // connect IN2, IN3 weakly to CM
// GAIN // GAIN
cw(0x00, 0x01); // select page 1 cw(0x00, 0x01); // select page 1
cw(0x3b, 0b00000000); // unmute left MICPGA, set gain to > 0db cw(0x3b, 0b00000000); // unmute left MICPGA, set gain to 0db
cw(0x3c, 0b00000000); // unmute right MICPGA, set gain to > 0db cw(0x3c, 0b00000000); // unmute right MICPGA, set gain to 0db
// VOLUME // VOLUME
cw(0x00, 0x01); // select page 1 cw(0x00, 0x01); // select page 1
@ -124,7 +124,7 @@ void setup() {
cw(0x12, 0x81); // NADC 1 cw(0x12, 0x81); // NADC 1
cw(0x13, 0x82); // MADC 2 cw(0x13, 0x82); // MADC 2
cw(0x14, 0x80); // OSR ADC 128 cw(0x14, 0x80); // OSR ADC 128
cw(0x3d, 0x01); // ADC PRB_R1 cw(0x3d, 0b00000001); // ADC PRB_R3 = 11, PRB_R2 = 10, PRB_R1 = 01
cw(0x00, 0x01); // select page 1 cw(0x00, 0x01); // select page 1
cw(0x3d, 0b01100100); // ADC PTM_R3 cw(0x3d, 0b01100100); // ADC PTM_R3
@ -165,13 +165,13 @@ void setup() {
// DAC VOLUME 0b00000000 = 0dB, 10000001 = -63.5dB, 0b00110000 = +24dB // DAC VOLUME 0b00000000 = 0dB, 10000001 = -63.5dB, 0b00110000 = +24dB
cw(0x00, 0x00); // select page 0 cw(0x00, 0x00); // select page 0
cw(0x41, 0b00000000); // LEFT cw(0x41, 0b11111001); // LEFT
cw(0x42, 0b00000000); // RIGHT cw(0x42, 0b11111001); // RIGHT
// ADC VOLUME 0b1101000 = -12dB, 0b00000000 = 0dB, 0b0101000 = +20dB // ADC VOLUME 0b1101000 = -12dB, 0b00000000 = 0dB, 0b0101000 = +20dB
cw(0x00, 0x00); // select page 0 cw(0x00, 0x00); // select page 0
cw(0x53, 0b00000000); // LEFT cw(0x53, 0b01110000); // LEFT
cw(0x54, 0b00000000); // RIGHT cw(0x54, 0b01110000); // RIGHT
// STATUS FLAGS // STATUS FLAGS
Serial.println("CODEC STATUS"); Serial.println("CODEC STATUS");
@ -213,7 +213,7 @@ void loop() {
// l = (int16_t)(sin(sine_pos) * 8192.0f); // l = (int16_t)(sin(sine_pos) * 8192.0f);
// r = l; // r = l;
i2s.write16(l, r); i2s.write16(l*-1, r*-1);
// volume += l + r; // volume += l + r;
// if(millis() - last > 1000){ // if(millis() - last > 1000){