diff --git a/soundcube-i2s-test/soundcube-i2s-test.ino b/soundcube-i2s-test/soundcube-i2s-test.ino new file mode 100644 index 0000000..4fff2c3 --- /dev/null +++ b/soundcube-i2s-test/soundcube-i2s-test.ino @@ -0,0 +1,125 @@ +/* + I2S bi-directional input and output buffered loopback example + Released to the Public Domain by Cooper Dalrymple +*/ +#include +#include + +I2S i2s(INPUT_PULLUP); + +#define SIZE 256 +int16_t buffer[SIZE]; + +void cw(char first, char second){ + Wire1.beginTransmission(0x18); + Wire1.write(first); + Wire1.write(second); + Wire1.endTransmission(); + delay(5); +} + +void setup() { + Serial.begin(115200); + + delay(1000); + + Wire1.setSDA(2); + Wire1.setSCL(3); + Wire1.begin(); + + delay(1000); + + // GENERAL + cw(0x00, 0x00); + cw(0x01, 0x01); + cw(0x1b, 0x10); // select I2S + + // ADC + cw(0x00, 0x00); // select page 0 + //cw(0x01, 0x01); // soft reset + cw(0x12, 0x87); // NADC 7 + cw(0x13, 0x82); // MADC 2 + cw(0x14, 0x80); // OSR ADC 128 + cw(0x3d, 0x01); // ADC PRB_R1 + + cw(0x00, 0x01); // select page 1 + cw(0x01, 0x08); // disable crude AVdd + cw(0x02, 0x01); // enable internal AVdd LDO + cw(0x0a, 0x0B); // set input CM to 0.9V and LO to 1.65V + cw(0x3d, 0x00); // ADC PTM_R4 + cw(0x34, 0x80); // route IN1L to LEFT_P with 20k input impedance + cw(0x36, 0x80); // route CM to LEFT_M with 20k input impedance + cw(0x37, 0x80); // route IN1R to RIGHT_P with 20k input impedance + cw(0x39, 0x80); // route CM to RIGHT_M with 20k input impedance + cw(0x3b, 0x0c); // unmute left MICPGA + cw(0x3c, 0x0c); // unmute right MICPGA + + cw(0x00, 0x00); // select page 0 + cw(0x51, 0xc0); // power up ADC + cw(0x51, 0x00); // unmute ADC digital volume control + + // DAC + cw(0x00, 0x00); // select page 0 + //cw(0x01, 0x01); // software reset + cw(0x0b, 0x82); // NDAC 2 + cw(0x0c, 0x87); // MDAC 7 + cw(0x0d, 0x00); // OSR DAC 128 + cw(0x0e, 0x80); // OSR DAC 128 + cw(0x1b, 0x10); // world length 20bits PTM_P4 (highest performance) + cw(0x3c, 0x08); // PRB_P8 + + cw(0x00, 0x01); // select page 1 + //cw(0x01, 0x08); // disable internal crude avdd + //cw(0x02, 0x01); // enable AVdd LDO + cw(0x7b, 0x01); // set REF charging time to 40ms + //cw(0x14, 0x25); // set HP soft stepping for anti pop + //cw(0x0a, 0x0B); // set input CM to 0.9V and LO to 1.65V + cw(0x0e, 0x08); // left DAC reconstruction filter routed to LOL + cw(0x0f, 0x08); // right DAC reconstruction filter routed to LOR + cw(0x03, 0x00); // DAC PTM_P3/4 + cw(0x04, 0x00); // DAC PTM_P3/4 + cw(0x12, 0x00); // LOL gain 0dB + cw(0x13, 0x00); // LOR gain 0dB + delay(1000); + + cw(0x00, 0x00); // select page 0 + cw(0x3f, 0xd6); // power up and route left digital audio to left dac channel and right to right + cw(0x40, 0x00); // unmute DAC digital volume + + + pinMode(19, OUTPUT); // MCLK enable + pinMode(20, OUTPUT); // CODEC reset + + i2s.setSysClk(48000); + + i2s.setDOUT(14); + i2s.setDIN(15); + i2s.setBCLK(16); // Note: LRCLK = BCLK + 1 + i2s.setMCLK(18); + i2s.swapClocks(); + i2s.setBitsPerSample(16); + i2s.setFrequency(48000); + i2s.setMCLKmult(128); // 6144000Hz 6.144MHz + + i2s.setBuffers(6, SIZE * sizeof(int16_t) / sizeof(uint32_t)); + + digitalWrite(19, HIGH); // enable MCLK + digitalWrite(20, HIGH); + i2s.begin(); + + size_t count, index; + while (1) { + count = i2s.read((uint8_t *)&buffer, SIZE * sizeof(int16_t)) * sizeof(uint32_t) / sizeof(int16_t); + index = 0; + while (index < count) { + // Reduce volume by half + buffer[index++] >>= 1; // right + buffer[index++] >>= 1; // left + } + i2s.write((const uint8_t *)&buffer, count * sizeof(int16_t)); + } +} + +void loop() { + /* Nothing here */ +}